Hello. I want to use ADC in 16F886 and using the following circuitry. PortA is connected to Vdd via 10K resistor, and to GND via 10K adjustable resistor.
But the problem is, that even if I set pot to maximum, at ADC pin I should have 2.5 volts, right? but I have 4.6. In fact, to pull it below 4.6, I need to set pot to 3k or less value. I've changed pot, resistor, double checked wiring - all appears to be fine. The code I'm using is shown below. What can be cause of this?
But the problem is, that even if I set pot to maximum, at ADC pin I should have 2.5 volts, right? but I have 4.6. In fact, to pull it below 4.6, I need to set pot to 3k or less value. I've changed pot, resistor, double checked wiring - all appears to be fine. The code I'm using is shown below. What can be cause of this?
Code:
;----[16F886 Hardware Configuration]--------------------------------------------
#CONFIG
cfg1 = _INTRC_OSC_NOCLKOUT ; INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN
cfg1&= _WDT_ON ; WDT enabled
cfg1&= _PWRTE_OFF ; PWRT disabled
cfg1&= _MCLRE_OFF ; RE3/MCLR pin function is digital input, MCLR internally tied to VDD
cfg1&= _CP_OFF ; Program memory code protection is disabled
cfg1&= _CPD_OFF ; Data memory code protection is disabled
cfg1&= _BOR_OFF ; BOR disabled
cfg1&= _IESO_ON ; Internal/External Switchover mode is enabled
cfg1&= _FCMEN_ON ; Fail-Safe Clock Monitor is enabled
cfg1&= _LVP_OFF ; RB3 pin has digital I/O, HV on MCLR must be used for programming
cfg1&= _DEBUG_OFF ; In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins
__CONFIG _CONFIG1, cfg1
cfg2 = _BOR40V ; Brown-out Reset set to 4.0V
cfg2&= _WRT_OFF ; Write protection off
__CONFIG _CONFIG2, cfg2
#ENDCONFIG
'chip configs
include "modedefs.bas"
TRISA=%00000000 'SET A TO OUTPUT
TRISC=%11110000
TRISB=%00000000
ANSELH=%00000000 ' ADC OFF B
ADCON1=%10000000 'adc justify
OSCCON=%01110101 'SET FREQUENCY TO 8MHZ
WPUB=%00000000 'turn off Pullups
CM1CON0=0 'DISABLE COMPARATORS
CM2CON0=0 'SAME HERE
DEFINE OSC 8
'adcin config
DEFINE ADC_BITS 10
DEFINE ADC_CLOCK 3
DEFINE ADC_SAMPLEUS 50
'lcd config
' Set LCD Data port
DEFINE LCD_DREG PORTC
' Set starting Data bit (0 or 4) if 4-bit bus
DEFINE LCD_DBIT 4
' Set LCD Register Select port
DEFINE LCD_RSREG PORTB
' Set LCD Register Select bit
DEFINE LCD_RSBIT 1
' Set LCD Enable port
DEFINE LCD_EREG PORTB
' Set LCD Enable bit
DEFINE LCD_EBIT 0
' Set LCD bus size (4 or 8 bits)
DEFINE LCD_BITS 4
' Set number of lines on LCD
DEFINE LCD_LINES 2
' Set command delay time in us
DEFINE LCD_COMMANDUS 1500
' Set data delay time in us
DEFINE LCD_DATAUS 44
'io config
cvladi var word
acho:
adcin 0,cvladi
lcdout $fe,2, #cvladi, " "
pause 100
goto acho